The present invention relates to a solid-state image sensing device.
In a solid-state image sensing device, the input condition thereto changes according to the luminance of a subject to be sensed. Therefore, when a subject of a high luminance is image-sensed, since an excessive electric charge transduced from light energy by the photodiode section of the device leaks to the vertical register, a phenomenon can be observed such that light spreads on a monitor picture from a high luminance position to a low luminance position. This phenomenon is referred to as blooming phenomenon. To prevent this phenomenon, an overflow drain is conventionally provided for the image sensing device.
FIG. 5 is a sectional diagram of a solid-state image sensing device having an overflow drain, which is conventionally used.
An n region 20 is formed in the surface of a p-type silicon substrate 10. A p-n junction formed by the n region and the substarate forms a photo diode. If light 30 is irradiated at this photo diode, electric charges are generated at the photo diode and in response to open/close state of a transfer gate 50, these electric charges are moved to a CCD section 40 which stores and transfers the charges. At the other side of the photo diode, an overflow drain 60 is provided. The amount of excessive electric charges is controlled by a voltage applied to a gate 70.
FIG. 6 shows the relationship between the blooming rate and the voltage V.sub.OFD applied to the gate provided for the overflow drain. In the drawing, when the overflow drain voltage V.sub.OFD is sufficiently high as within a range A, since the blooming phenomenon can be sufficiently suppressed, it is possible to reduce the blooming rate in the case where a high luminance subject is image-sensed. In contrast, when the overflow drain voltage V.sub.OFD is low as within a range B, since the blooming phenomenon cannot be sufficiently suppressed, the blooming phenomenon is observed. As described above, the lower limit of the overflow drain voltage V.sub.OFD at which the blooming phenomenon can be suppressed is a point C corresponding to a boundary between the two ranges A and B. Therefore, the range A of the overflow drain voltage V.sub.OFD is a practical voltage range.
On the other hand, the overflow drain voltage V.sub.OFD exerts an influence upon the saturation characteristics in relation to the quantity of electric charge to be accumulated. FIG. 7 shows the relationship between the overflow drain voltage V.sub.OFD and the saturation voltage obtained by converting the quantity of accumulated electric charge. To increase the saturation voltage, it is desirable to reduce the overflow drain voltage V.sub.OFD. However, since there exists a limit of the quantity of accumulated electric charge, it is impossible to increase the electric charge quantity beyond the limit, even if the voltage V.sub.OFD is reduced unnecessarily.
On the other hand, the saturation voltage should be higher than a white-clip level when the image signals are processed. Therefore, although it is effective to determine a higher overflow drain voltage V.sub.OFD in order to sufficiently suppress the blooming phenomenon, the overflow drain voltage must be lower than the value corresponding to the minimum saturation voltage. In general, because low blooming is more important than high saturation voltage, the overflow drain voltage V.sub.OFD is not set to the value C, which corresponds to the saturation voltage F, having excessive margin but E, which corresponds to the minimum saturation voltage D.
As described above, the overflow drain voltage V.sub.OFD is adjusted according to the usage. Further, since this voltage V.sub.OFD differs according to the manufacturing process, the voltage V.sub.OFD ranges between several volts and tens and several volts.
In practice, therefore, each solid-state image sensing device is inspected at the wafer stage in order to detect an optimum overflow drain voltage V.sub.OFD. However, it is necessary to indicate or store the detected optimum voltage V.sub.OFD by use of some means. Or else, the same inspection work must be repeated at the stage of device forming process.
Conventionally, therefore, an optimum overflow drain voltage V.sub.OFD is indicated on a predetermined position 702 of a casing 701 of a solid-state image sensing device, as shown in FIG. 8, in order to eliminate the waste inspection work. That is, when the solid-state image sensing device is assembled in an apparatus (e.g. camera), an optimum overflow drain voltage is applied to the image sensing device by reading the previously indicated V.sub.OFD.
The prior-art method of indicating various optimum voltages by stamping work, for instance is very troublesome in mass-production process, in particular. This is because since the optimum overflow drain voltage V.sub.OFD of the devices differ from each other as already explained, the optimum voltages must be classified into about several tens of ranges at 0.5 V intervals in general before stamping the indication values. Where the above-mentioned troublesome work is performed by workers, the efficiency is extremely low and further there exists a problem in that error is inevitably produced during the classification and stamping work. To overcome this problem, although it may be possible to automatize the above-mentioned work, the automation system may entail extremely high development and manufacturing costs, because the optimum values inspected in the inspection process must be stored in relation to the corresponding devices and further stamped on the corresponding devices.
Similar problems arise when other device operating voltages (e.g. reset voltage) are inspected, classified and stamped, as well as the overflow drain voltage.